To meet the development trend of a radio base station toward miniaturization, low costs and low power consumption, a radio-on-chip (ROC, Radio on Chip) has been developed. The ROC integrates a digital circuit and a radio frequency (RF, Radio Frequency) circuit into a single chip, so as to greatly reduce an area of a board and cost of a base station, and further minimize power consumption so as to meet the trend of Power over Ethernet (PoE, Power over Ethernet).
However, the ROC introduces a new problem, that is, interference of the digital circuit on the RF circuit. In the conventional ROC, when the digital circuit uses a single-phase clock, a relatively large charge/discharge current exists because the digital circuit in the ROC basically turns over near a rising edge of the clock. Consequently, a high-energy interfering pulse signal is generated near the rising edge. Because a radio frequency has dozens of frequency bands, and no matter which clock frequency is selected, an interfering pulse signal or a harmonic derived from the interfering pulse signal may fall within some radio frequency bands, thereby resulting in worsening of receiving sensitivity, saturation of a receiving ADC, or deterioration of an EVM of a signal, so that an indicator requirement in a protocol cannot be met. In view of this, how to avoid interference of the digital circuit on the RF circuit is very important for ensuring performance of the ROC.